In order to achieve higher recording densities, designers of magnetic recording channels have switched from analog peak detection techniques to sampled data detection techniques. In sampled data detection systems, the readback signal is filtered and sampled at the channel rate of 1/T, where T is the duration of a channel symbol. One such technique is referred to as partial response maximum likelihood (PRML). The most common PRML system uses filters to equalize the readback signal to a partial response class 4 (PR4) signal. The discrete-time transfer function of a PR4 channel is (1-D.sup.2), where D represents a unit-time delay operator with unit-time T. Therefore, the noiseless output of the PR4 channel is equal to the input signal minus a version of the input signal delayed in time by 2T. In a PRML system, the output of the noisy partial response channel is sampled at the channel rate and detected using a Viterbi detector. Typically, the Viterbi detector is designed for maximum-likelihood detection of the sampled partial response channel in additive, independent, and identically distributed Gaussian noise with zero mean.
The PR4 (1-D.sup.2) channel is equivalent to bit-wise interleaving two (1-D') channels, each operating at one-half of the channel rate, such that D' is a unit-time delay operator with unit-time 2T, i.e., D'=D.sup.2. Since a Viterbi detector for the (1-D') channel has a low complexity implementation, a Viterbi detector for the PR4 channel is frequently implemented by interleaving two Viterbi detectors for (1-D') channels. With this implementation, the PR4 Viterbi detector operates at one-half of the channel rate enabling the channel rate to increase significantly before running into technical difficulties implementing high speed electronics within a very large scale integrated (VLSI) circuit. An example of a PR4 Viterbi detector employing two interleaved (1-D') Viterbi detectors may be found in commonly assigned Nguyen U.S. Pat. No. 5,341,387 for Viterbi Detector for PRML Class IV in Disk Drive, the disclosure thereof being incorporated herein by reference.
Recently, there has been interest in sampled data detection techniques for magnetic recording with better performance than partial response class 4 with maximum-likelihood detection (PR4ML). Since the noise on the magnetic recording channel is colored by the filter used to equalize the signal to a partial response signal, the noise corrupting the sampled output of the partial response channel is more accurately described as additive, correlated Gaussian noise. Typically, the noise correlation degrades performance when a Viterbi detector that ignores the noise correlation is used. However, including the effect of noise correlation in the Viterbi detector is rarely done since this greatly increases the complexity. The degradation due to noise correlation can be minimized by selecting a partial response channel that more closely matches the frequency response of the magnetic recording channel.
At normalized recording densities above two channel symbols per pulse width at half-maximum, PW50/T&gt;2.0, the frequency response of the magnetic recording channel resembles the frequency response of an EPR4 channel more closely than a PR4 channel. The extended parital response class 4 (EPR4) channel, with discrete-time transfer function (1+D-D.sup.2 -D.sup.3), has more low frequency and less high frequency content than the PR4 channel. Extended partial response class 4 with maximum-likelihood detection (EPR4ML) yields better performance at the higher recording densities, since equalizing a magnetic recording channel to an EPR4 channel response results in less high frequency noise enhancement. However, unlike the PR4 Viterbi detector described above, the EPR4 Viterbi detector can not be separated into two independent, interleaved, low complexity detectors running at one-half of the channel rate. As a consequence, the main drawback to implementing EPR4ML within a magnetic recording system has heretofore been that the EPR4 Viterbi detector is much more complex than a PR4 Viterbi detector, and has been practically realized only at considerably greater expense.
At sample time n, corresonding to time nT, the input symbol is x[n] and the noiseless output of the EPR4 channel is given by y.sub.EPR4 [n]=x[n]+x[n-1]-x[n-2]-x[n-3]. Since the input symbols are binary, there are five possible channel output symbols, which are -2, -1, 0, 1, and 2. The channel output symbols are also referred to as the noiseless EPR4 samples or the ideal EPR4 samples. The EPR4 channel has eight states corresponding to the eight possible values of the last three binary input symbols, s[n]={x[n-3], x[n-2], x[n-1]}. The state transition diagram for the EPR4 channel shows the channel output symbol and the next state associated with all possible combinations of the binary input symbol and the state. The trellis diagram is obtained by adding a time axis to the state transition diagram. Each depth of the trellis represents one channel rate clock period. At the beginning of the clock period n, the EPR4 channel can be in any one of eight possible states. Given a particular state, there are two possible next states depending on the value of the binary input symbol. The paths through the trellis represent all possible binary input sequences.
The standard approach to implementing a Viterbi detector is to use the Viterbi algorithm to minimize the squared Euclidean distance between the sequence of noisy samples and all possible sequences of noiseless samples. The Viterbi algorithm is an iterative algorithm for determining the minimum metric path through a trellis, where the metric in this case is the squared Euclidean distance. During each clock cycle, an EPR4 Viterbi detector updates eight state metrics and selects one survivor path for each of the eight states. The survivor path represents the minimum metric path leading to a particular state, and the state metric represents the metric associated with that survivor path. In order to update the eight state metrics, the detector extends the survivor paths to obtain two paths to each state in the next trellis depth. A path metric is obtained by adding a state metric to a branch metric, where the branch metric represents the squared Euclidean distance between the current noisy sample and the noiseless sample associated with the branch. The paths metric associated with the two paths entering each state are compared and the minimum metric path is selected as the survivor path and the path metric for this path is selected as the new state metric. During each clock cycle, sixteen path metrics are calculated and eight comparisons are performed.
If it is not possible to perform the serial operations required to update the state metrics at the desired channel rate with the current VLSI technology, then the Viterbi algorithm can be implemented at one-half the channel rate using an eight state trellis with four branches entering each state. In this case, each trellis depth represents two channel rate clock cycles. Although the clock period doubles with this approach, the total number of operations more than doubles. Therefore, there is a significant implementation cost associated with increasing the channel rate.
Another approach to implementing an EPR4 Viterbi detector follows a difference metric implementation as described in e.g. Knudson, Wolf and Milstein, "Dynamic Threshold Implementation of the Maximum-Likelihood Detector for the EPR4 Channel", IEEE GlobeCom'91 Conf. Record, Vol. 3, GlobeCom, Phoenix, Ariz., December 1991, pp. 60B.1.1-60B.1.5. The difference metric is defined as the difference between the two path metrics entering a particular state. The sign of the difference metric is equalivalent to a comparison of the two path metrics. In this approach, eight difference metrics are updated during each clock cycle. Unfortunately, the difference metric implementation is only slightly less complex than the standard state metric implementation of an EPR4 Viterbi detector.
One way of reducing the complexity of an EPR4 Viterbi detector is to use decision feedback to subtract out the last trailing interfering symbol. Using this approach, the number of states in the trellis reduces to four corresponding to the two remaining interfering symbols. The EPR4 equalized samples are detected using a four-state trellis with local decision feedback to subtract out the last interfering symbol. Unfortunately, this decision feedback approach for EPR4 has degraded performance, since the last interfering symbol contributes a significant amount to the energy in the channel response. As a result, this decision feedback approach does not yield significantly better results than obtainable from a PR4ML detection channel. In general, the decision feedback approach is better suited to equalizer targets with less energy contribution from the trailing interfering symbols that are feedback.
Another implementation approach is to use a PR4 Viterbi detector, followed by a post-processor for EPR4. A post-processor for an EPR4 channel that achieves nearly maximum-likelihood performance was described by Wood, "Turbo PRML: A Compromise EPRML Detector", IEEE Trans. on Magnetics, Vol. 29, No. 6, November 1993, pp. 4018-4020. In the Turbo PRML post-processor technique, PR4 equalized samples are sent to a PR4 Viterbi detector that produces a preliminary estimate of the binary input sequence. Then, the preliminary estimate is sent to the post-processor to produce a final improved estimate of the binary input sequence.
The post-processor improves the preliminary estimate by correcting non-overlapping minimum distance error-events. Since the post-processor uses the same metric as an EPR4 Viterbi detector, the criterion used to correct minimum distance error-events is the same criterion used in an EPR4 Viterbi detector to select survivor paths. The post-processor approach uses the preliminary estimate from the PR4 Viterbi detector to indicate a path through the eight-state EPR4 trellis, which will be referred to as the PR4 path. At each state along the PR4 path, the post-processor calculates error-event metrics for all possible minimum distance error-events ending at this particular state. The error-event metric is related to the difference between the path metrics for the PR4 path and a contender path that diverges from the PR4 path and remerges for the first time at this particular state. The contender paths are chosen such that the PR4 path and the contender paths are separated by the minimum distance, which means that the squared Euclidean distance between the noiseless signals on the two paths is the smallest possible value between any two paths in the EPR4 trellis. The noise on the PR4 channel may cause the PR4 Viterbi detector detector to make an error when selecting the PR4 path. Since an EPR4 channel has less noise enhancement, the post-processor can correct this error by selecting a contender path over the PR4 path. Assuming that only minimum distance error-events occur and that the error-events are separated by at least the distance of the longest minimum distance error-event, then the output of the EPR4 post-processor is equal to the output of an EPR4 Viterbi detector.
If the path metric for a particular contender path is smaller than the path metric for the PR4 path, then that contender path qualifies as a possible error-event, since an EPR4 Viterbi detector would have selected the contender path over the PR4 path. After all the error-event metrics are calculated, compared, and qualified, the most likely error-event ending at the current state is selected. In order to avoid correcting error-events which overlap, the post-processor keeps track of the most-likely error event ending at any of the states within a window of time prior to the current time, where the length of the window is equal to the maximum length of a minimum distance error-event. If the most likely error-event ending at the current state is more likely than the best error-event stored in the window, then the best error-event in the window is updated to correspond to the error-event ending at the current state. The best error-event in the window is corrected only when it corresponds to an error-event ending at the oldest state in the window.
There are two distinct types of minimum distance error-events in the EPR4 trellis, which we will refer to as "type A" and "type B". For a rate 8/9 (d=0, G=4/I=4) modulation code, there are nine possible minimum distance error-events ending at a particular state: four are "type A" and five are "type B". For this code, the write current following the 1/(1.sym.D.sup.2) precoder satisfies the following conditions. The interleave constraint on the input to the precoder, I=4, implies that there are at most five consecutive 1's or 0's in the even or odd interleaved write current sequences, i.e., the substrings 1.times.1.times.1.times.1.times.1.times.1 and 0.times.0.times.0.times.0.times.0.times.0, where x indicates don't care, are not allowed in the write current sequence. The global constraint at the input to the precoder, G=4, implies that there are at most six consecutive 1's, 0's, or alternating 0's and 1's in the global write current sequence, i.e., the substrings 1111111, 0000000, 1010101, and 0101010 are not allowed. For this code, the four "type A" error-events correspond to mistaking the following write current sequences:
______________________________________ 101 and 010 1010 and 0101 10101 and 01010 101010 and 010101. ______________________________________
The five "type B" error-events correspond to mistaking the following write current sequences:
______________________________________ 1 and 0 1 .times. 1 and 0 .times. 0 1 .times. 1 .times. 1 and 0 .times. 0 .times. 0 1 .times. 1 .times. 1 .times. 1 and 0 .times. 0 .times. 0 .times. 0 1 .times. 1 .times. 1 .times. 1 .times. 1 and 0 .times. 0 .times. 0 .times. 0 .times. 0. ______________________________________
For the rate 8/9 (0,4/4) modulation code, the Turbo PRML post-processor consists of 6 adders and 10 comparators. This circuitry is in addition to the PR4 Viterbi detector, which consists of 4 adders and 4 comparators. The total required circuitry necessarily includes 10 adders and 14 comparators. For comparison, an EPR4 Viterbi detector requires 14 adders and 8 comparators. Since the Turbo PRML post-processor described in the Wood article is even more complex than a conventional EPR4 Viterbi detector, there is little cost benefit to using the post-processor described in that article.
However, the main benefit to the post-processing approach is that the feedback path associated with the updating process in the Viterbi detector is eliminated, allowing for more pipelining and higher channel rates. Furthermore, the Turbo PRML post-processor can be modified to operate at even faster channel rates by using a half-rate clock and considering all the minimum distance error-events ending at two consecutive states during a half-rate clock period. For the rate 8/9 (0,4/4) code, the Turbo PRML post-processor requires 10 adders and 18 comparators when operating at one-half the channel rate. Including the PR4 Viterbi detector, the total number of operations is 14 adders and 22 comparators.
The post-processing approach is well-suited for high data rate applications by offering a reasonable trade-off between speed and complexity. In order to further increase the data rate, a higher rate modulation code with larger global and interleave constraints can be used. However, the looser constraints lead to an increase in the number of possible error-events. Since the Turbo PRML post-processor has hardware dedicated to calculating the error-event metric for each possible minimum distance error-event, this further increases the number of operations in the Turbo PRML post-processor.
A reduced complexity EPR4 post-processor referred to as simplified partial error response detection (SPERD) was presented by Yamakawa and Nishiya in a poster session at the INTERMAC conference in June of 1994. They simply reduced the complexity of the Turbo PRML post-processor by considering only two type B error-events ending at each state along the PR4 path. Since short error-events are more likely than long error-events, this approach considers only the two shortest minimum distance error-events which correspond to making one or two symbol errors. The SPERD approach can only lead to good performance when the probability of an error-event that is not one of the two considered is very small. One drawback to this approach is that the probabilities of longer error-events increase when modulation codes with looser constraints than the rate 8/9 (0,4/4) code are used. Therefore, the SPERD approach potentially compromises performance for a significant reduction in complexity.
Thus, a heretofore unsolved need has been for a reduced complexity EPR4 post-processor that does not significantly compromise performance compared to an EPR4 Viterbi detector.